Peer-reviewed papers in international conferences:
Partner – Citation
D4T – L. M. A. van de Logt, V. A. Zivkovic, I. H. A. van Baast, “An Original Model-based driven AMS Test Setup Validation Flow prepared for IEEE P1687.2”, IEEE European Test Symposium (ETS), Baden-Baden, Germany, 2019
INVIA, LIRMM – S. Lapeyre, N. Valette, M. Merandat, M.-L. Flottes, B. Rouzeyre, A. Viraze, “A Plug and Play Digital ABIST Controller for Analog Sensors in Secure Devices”, 25th IEEE European Test Symposium, 2021 (submitted)
IROC – Issam Nofal, Adrian Evans, A.-L. He, Gang Guo, Yuanqing Li, Li Chen, Rui Liu, Haibin Wang, Mo Chen, Sang H. Baeg, Shi-Jie Wen, Richard Wong, “BPPT – Bulk potential protection technique for hardened sequentials” IOLTS 2017: 28-32
IROC – Dan Alexandrescu, Adrian Evans, Maximilien Glorieux, Issam Nofal, “EDA support for functional safety – How static and dynamic failure analysis can improve productivity in the assessment of functional safety”. IOLTS 2017: 145-150
IROC – Dan Alexandrescu, Aneesh Balakrishnan, Thomas Lange, Maximilien Glorieux, “Enabling Cross-Layer Reliability and Functional Safety Assessment Through ML-Based Compact Models”. IOLTS 2020: 1-6
LIRMM – E. Valea, M. Da Silva, G. Di Natale, S. Dupuis, M.-L. Flottes, B. Rouzeyre, “SECCS: SECure Context Saving for IoT Devices”, IEEE International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS), 2018
LIRMM – M. Da Silva, E. Valea, M.-L. Flottes, S. Dupuis, G. Di Natale, B. Rouzeyre, “Encryption of test data: which cipher is better?”, Conference on Ph.D Research in Microelectronics and Electronics (PRIME), 2018
LIRMM – E. Valea, M. Da Silva, M.-L. Flottes, G. Di Natale, S. Dupuis, B. Rouzeyre, “Providing Confidentiality and Integrity in Ultra Low Power IoT Devices”, IEEE International Conference on Design & Technology in Nanoscale Era (DTIS), 2019, Mykonos, Greece.
LIRMM – E. Valea, M. Da Silva, M. L. Flottes, G. Di Natale, B. Rouzeyre, “Encryption-Based Secure JTAG”, 22nd International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS), 2019, Cluj-Napoca, Romania.
LIRMM – E. Valea, M. Flottes, G. Di Natale, B. Rouzeyre, “Encryption Techniques for Test Infrastructures”, 24th European Test Symposium (ETS), Ph.D. Forum, Baden Baden, Germany, May 2019
LIRMM – B. Deveautour, M. Traiola, A. Virazel, P. Girard, “QAMR: an Approximation-Based FullyReliable TMR Alternative for Area Overhead Reduction”, IEEE European Test Symposium (ETS), Tallinn, Estonia, 2020
LIRMM – F. Azaïs, S. Bernard, M. Comte, B. Deveautour, S. Dupuis, H. El Badawi, M.-L. Flottes, P. Girard, V. Kerzerho, L. Latorre, F. Lefèvre, B. Rouzeyre, E. Valea, T. Vayssade, A. Virazel, “Development and Application of Embedded Test Instruments to Digital, Analog/RFs and Secure ICs”, 26th IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS’2020), virtual event
LIRMM, CEA – B. Deveautour, A. Virazel, P. Girard, S. Pravossoudovitch, V. Gherman, “Is Aproximate Computing Suitable for Selective Hardening of Arithmetic Circuits?”, IEEE International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS), 2018
LIRMM, NXP-FR – T. Vayssade, F. Azais, L. Latorre and F. Lefevre, “Low-cost functional test of a 2.4GHz OQPSK transmitter using standard digital ATE,” IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS), Platja d’Aro, Spain, 2018
LIRMM, NXP-FR – “H. El Badawi, F. Azais, S. Bernard, M. Comte, V. Kerzerho and F. Lefevre, “”Use of ensemble methods for indirect test of RF circuits: can it bring benefits?””, IEEE Latin-American Test Symposium (LATS), Santiago, Chili, 2019
LIRMM, NXP-FR – “T. Vayssade, F. Azais, L. Latorre, F. Lefevre, “”Power Measurement and Spectral Test of ZigBee Transmitters from 1-bit Under-sampled Acquisition””, IEEE European Test Symposium (ETS), Baden-Baden, Germany, 2019
LIRMM, NXP-FR – “H. El Badawi, F. Azais, S. Bernard, M. Comte, V. Kerzérho, F. Lefevre, “”Which metrics to use for RF indirect test strategy?””, International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), Lausanne, Swizerland, 2019
LIRMM, NXP-FR – F. Azais, S. Bernard, M. Comte, B. Deveautour, S. Dupuis, H. El Badawi, M.-L. Flottes, P. Girard, V. Kerzerho, L. Latorre, F. Lefèvre, B. Rouzeyre, E. Valea, T. Vayssade, A. Virazel. « Development and Application of Embedded Test Instruments to Digital, Analog/RFs and Secure ICs ». IOLTS 2020
LIRMM, NXP-FR – T. Vayssade, F. Azaïs, L. Latorre, et F. Lefèvre. « EVM measurement of RF ZigBee transceivers using standard digital ATE », IEEE Defect and Fault Tolerance Symposium (DFTS), Frascati, Italie, 2020
LIRMM, NXP-FR – T. Vayssade, F. Azaïs, L. Latorre, et F. Lefèvre. « Digital test of ZigBee transmitters: Validation in industrial test environement », Accepted at IEEE/ACM Design, Automation and Test Conference in Europe (DATE), 2021
LIRMM, NXP-FR – H. El Badawi, F. Azais, S. Bernard, M. Comte, V. Kerzerho, F. Lefevre and I.Gorenflot, “Implementing indirect test of RF circuits without comprising test quality: a practical case study”, IEEE Latin-American Test Symposium (LATS), Maceio, Brazil, 2020
LIRMM, ST – S. Mhamdi, A. Virazel, P. Girard, A. Bosio, E. Auvray, E. Faehn, A. Ladhar, “Towards Improvement of Mission Mode Failure Diagnosis for System-on-Chip”, 25th IEEE International Symposium on On-Line Testing and Robust System Design, 2019
NXP-NL, TIMA – M. Laisne, A. Crouch, M. Portolan, M. Keim, H.M von Staudt, M. Abdalwahab, B. van Treuren, J. Rearick, “Modeling Novel Non-JTAG IEEE 1687-Like Architectures”, International Test Conference (ITC 2020), Washington DC, United States, Nov 2020
SU-LIP6 – H.-G. Stratigopoulos, “Machine learning applications in IC testing,” IEEE European Test Symposium (ETS), Bremen, Germany, May 2018
SU-LIP6 – S. A. El-Sayed, L. A. Camunas-Mesa, B. Linares-Barranco, H.-G. Stratigopoulos, “Self-Testing Analog Spiking Neuron Circuit”, International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), Lausanne, Switzerland, July 2019
SU-LIP6, ST – A. Pavlidis, M.-M. Louërat, E. Faehn, A. Kumar, and H.-G. Stratigopoulos, “Symmetry-based A/M-S BIST (SymBIST): Demonstration on a SAR ADC IP, ” Design, Automation and Test in Europe Conference, Grenoble, France, March 2020
SU-LIP6 – S. A. El-Sayed, T. Spyrou, A. Pavlidis, E. Afacan, L. A. Camunas-Mesa, B. Linares-Barranco, and H.-G. Stratigopoulos, “Spiking Neuron Hardware-Level Fault Modeling,” IEEE International Symposium on On-Line Testing and Robust System Design, Naples, Italy, July 2020
SU-LIP6 – S. A. El-Sayed, T. Spyrou, A. Pavlidis, E. Afacan, L. A. Camunas-Mesa, B. Linares-Barranco, and H.-G. Stratigopoulos, “Neuron Fault Tolerance in Spiking Neural Networks,” Design, Automation & Test in Europe Conference, Virtual Conference, 2021 (to appear)
SU-LIP6, ST – A. Pavlidis, E. Faehn, M.-M. Louërat, and H.-G. Stratigopoulos, “BIST-Assisted Analog Fault Diagnosis, ” IEEE European Test Symposium, Bruges, Belgium, May 2021 (submitted)
SU-LIP6, TIMA – M. Elshamy, G. Di Natale, A. Pavlidis, M.-M. Louërat, and H.-G. Stratigopoulos, “Hardware Trojan Attacks in Analog/Mixed-Signal ICs via the Test Access Mechanism, ” IEEE European Test Symposium, Tallinn, Estonia, May 2020
TIMA – R. S. Feitoza, M. J. Barragan, S. Mir and D. Dzahini, “Reduced-code static linearity test of SAR ADCs using a built-in incremental Σ∆ converter.” IEEE Int. Symp. on On-Line Testing and Robust System Design (IOLTS). July 2018, pp. 1-6.
TIMA – A. Sivadasan, R. Jitendrakumar Shah, V. Huard, F. Cacho, L. Anghel, “NBTI aged cell rejuvenation with back biasing and resulting critical path reordering for digital circuits in 28nm FDSOI”, Design, Automation & Test in Europe Conference & Exhibition (DATE), 2018.
TIMA – “R. Shah, F. Cacho, V. Huard, S. Mhira, D. Arora, P. Agarwal, S. Kumar, S. Balaraman, B. Singh, L. Anghel. “Investigation of speed sensors accuracy for process and aging compensation”, IEEE International Reliability Physics Symposium (IRPS), 2018.
TIMA – K. S. Kannan, M. Portolan, L. Anghel, “Run-Time Prediction through Machine-Learning”, IEEE International Test Confeence, 2018
TIMA – Renato S. Feitoza, Manuel J. Barragan and Salvador Mir, “Reduced-code Techniques for On-Chip Static Linearity Test of SAR ADCs”, 27th IFIP/IEEE International Conference on Very Large Scale Integration, Cuzco, October 2019, pp. 1-6.
TIMA – R. Silveira Feitoza, M. Barragan, A. Gines, S. Mir, On-chip reduced-code static linearity test of Vcm -based switching SAR ADCs using an incremental analog-to-digital converter, IEEE European Test Symposium (ETS 2020), Tallinn, ESTONIA, DOI: 10.1109/ETS48528.2020.9131588, 25 mai au 1 juin 2020
TIMA – M. Portolan, V. Reynaud, P. Maistri, R. Leveugle, Dynamic Authentication-Based Secure Access to Test Infrastructure, European Test Symposium (ETS 2020), Tallin, ESTONIA, 25 mai au 1 juin 2020
TIMA – M. Portolan, J. Rearick, M. Keim, Linking Chip, Board, and System Test via Standards, European Test Symposium (ETS 2020), Tallinn, ESTONIA, 25 mai au 1 juin 2020
TIMA – A. Damljanovic, A. Jutman, M. Portolan, E. Sanchez, G. Squillero, A. Tsertov, Simulation-based Equivalence Checking between IEEE 1687 ICL and RTL, International Test Conference (ITC 2019), Washington DC, UNITED STATES, 11 au 14 novembre 2019
TIMA – R. Silveira Feitoza, M. Barragan, A. Ginés and S. Mir, “Static linearity BIST for Vcm-based switching SAR ADCs using a reduced-code measurement technique”, 18th IEEE International NEWCAS Conference, Montreal, Canada, 16-19 June, 2020.
TIMA – G. T. Tchendjou, E. Simeu, and F. Lebowsky, “Fpga implementation of machine learning based image quality assessment,” in 29th International Conference on Microelectronics (ICM). IEEE, 2017, pp. 1–4
TIMA – G. T. Tchendjou and E. Simeu, “Self-healing image sensor using defective pixel correction loop,” in 2019 International Conference on Control, Automation and Diagnosis (ICCAD), IEEE, 2019.
TIMA – M. Portolan, R. S. Feitoza, G. T. Tchendjou, V. Reynaud, K. Kannan, M. Barragán, E. Simeu, P. Maistri, L. Anghel, R. Leveugle, S. Mir, “A Comprehensive End-to-end Solution for a Secure, and Dynamic Mixed-signal 1687 System”, Invited talk, 26th IEEE International Symposium on On-Line Testing and Robust System Design, Naples, Italy, July 13-15, 2020.
TIMA, ST – “R. Shah, F. Cacho, R. Lajmi, L. Anghel, “”Aging Investigation of Digital Circuit using In-Situ Monitor””, IEEE International Integrated Reliability Workshop, 2018
Univ, Twente – L. Bagheriye, G. Ali and H. G. Kerkhoff, “Life-Time Prognostics of Dependable VLSI-SoCs using Machine-learning”, IEEE 26th International Symposium on On-Line Testing and Robust System Design (IOLTS), Napoli, Italy, 2020, pp. 1-4
Univ, Twente – G. Ali, L. Bagheriye and H. G. Kerkhoff, “On-Chip Embedded Instruments Data Fusion and Life-Time Prognostics of Dependable VLSI-SoCs using Machine-Learning”, IEEE International Symposium on Circuits and Systems (ISCAS), Sevilla, 2020, pp. 1-5
Univ, Twente – G. Ali, L. Bagheriye, H. Manhaeve and H. G. Kerkhoff, “On-chip EOL Prognostics Using Data-Fusion of Embedded Instruments for Dependable MP-SoCs”, IEEE Asian Test Symposium (ATS), Malaysia, 2020, pp. 1-6
Univ. Twente – G. Ali, H. Ebrahimi, J. Pathrose and H. G. Kerkhoff, “Design and implementation of a dependable CPSoC for automotive applications,” IEEE Industrial Cyber-Physical Systems (ICPS), St. Petersburg, Russia, 2018, pp. 246-251
Univ. Twente – G. Ali, J. Pathrose and H. G. Kerkhoff, “On-Chip Lifetime Prediction for Dependable Many-Processor SoCs based on Data Fusion,” IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC), Hanoi, Vietnam, 2018
Univ. Twente – J. Pathrose, G. Ali and H. G. Kerkhoff, “Enhancing Physical Unclonable Function Robustness Employing Embedded Instruments,” IEEE Asia pacific Conference on Circuits and Systems, Chengdu, China, 2018
Univ. Twente – G. Ali, J. Pathrose and H. G. Kerkhoff, “IJTAG Compatible Delay-line based Voltage Embedded Instrument with One Clock-Cycle Conversion Time,” IEEE Latin America Test Symposium (LATS), Santiago, Chile, 2019
Univ. Twente – A. Ibrahim, A.Ibrahim, M.Safar, M. W. El-Kharashi , H. Kerkhoff, “Efficient Structured Scan Patterns Retargeting for Hierarchical IEEE 1687 Networks,” IEEE VLSI Test Symposium (VTS), Monterey, USA, 2019
Univ. Twente – G. Ali, J. Pathrose and H. G. Kerkhoff, “IJTAG Compatible Timing Monitor with Robust Self-Calibration for Environmental and Aging Variations,” IEEE European Test Symposium (ETS), Baden-Baden, Germany, 2019
Univ. Twente – “A. Ibrahim, H. Kerkhoff, “”An On-chip IEEE 1687 Network Controller for Reliability and Functional Safety Management of System-on-Chips,”” International Test Conference in ASIA (ITC-ASIA), Tokyo, Japan, 2019, pp. 1-6.
Univ. Twente – “A. Ibrahim, H. Kerkhoff, “”DARS: An EDA Framework for Reliability and Functional Safety Management of System-on-Chips,”” International Test Conference (ITC), Washington, D.C, USA, 2019, pp. 1-10.
Univ. Twente, D4T – J. Pathrose , L. van de Logt, H.G. Kerkhoff,”Analog Test Interface for IEEE 1687 Employing Split SAR Architecture to Support Embedded Instrument Dependability Applications”, IEEE Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, Delft, Netherlands 2019
Journal papers:
CEA, LIRMM – M. Seif, E. Farjallah, F. Badets, E. Chabchoub, C. Layer, J.-M. Armani, F. Joffre, C. Anghel, L. Dilillo and V. Gherman, “Refresh frequency reduction of data stored in SSDs based on A-timer and timestamps,” IEEE European Test Symposium (ETS), 2017, pp. 1-6.
IROC – R. Garcia Alıa, D. Alexandrescu, M. Glorieux, et al., “Direct Ionization Impact on Accelerator Mixed-Field Soft Error Rate”, IEEE Nuclear and Space Radiation Effects Conference, 2019
IROC – Haibin Wang, Xixi Dai, Younis Mohammed Younis Ibrahim, Hongwen Sun, Issam Nofal, Li Cai, Gang Guo, Zicai Shen, Li Chen, “A Layout-Based Rad-Hard DICE Flip-Flop Design”. J. Electron. Test. 35(1): 111-117 (2019)
IROC – Yuanqing Li, Li Chen, Issam Nofal, Mo Chen, Haibin Wang, Rui Liu, Qingyu Chen, Milos Krstic, Shuting Shi, Gang Guo, Sang H. Baeg, Shi-Jie Wen, Richard Wong, “Modeling and analysis of single-event transient sensitivity of a 65 nm clock tree”. Microelectron. Reliab. 87: 24-32 (2018)
IROC – Haibin Wang, Xixi Dai, Yangsheng Wang, Issam Nofal, Li Cai, Zicai Shen, Wanxiu Sun, Jinshun Bi, Bo Li, Gang Guo, Li Chen, Sang H. Baeg, “A single event upset tolerant latch design. Microelectron”. Reliab. 88-90: 909-913 (2018)
LIRMM – A. Virazel, I. Wali, B. Deveautour, A. Bosio, P. Girard, M. Sonza Reorda, “A Low-Cost Reliability vs. Cost Trade-Off Methodology to Selectively Harden Logic Circuits”, Journal of Electronic Testing, Springer Verlag, Vol.33 (1), p.25-36, 2017
LIRMM – E. Valea, M. Da Silva, M.-L. Flottes, G. Di Natale, B. Rouzeyre, “Stream vs block ciphers for scan encryption”, Microelectronics Journal, Vol. 86, pp. 65-76, 2019
LIRMM – E. Valea, M. Da Silva, G. Di Natale, M. Flottes and B. Rouzeyre, “A Survey on Security Threats and Countermeasures in IEEE Test Standards,” in IEEE Design & Test, vol. 36, no. 3, pp. 95-116, June 2019, doi: 10.1109/MDAT.2019.2899064.
LIRMM, NXP-FR – “T. Vayssade, F. Azais, L. Latorre, F. Lefevre, “”Low-cost Digital Test Solution for Symbol Error Detection of RF ZigBee Transmitters””, IEEE Transactions on Device and Materials Reliability (TDMR), vol. 19, no. 1, pp. 16-24, 2019
LIRMM, NXP-FR – T. Vayssade, F. Azaïs, L. Latorre, et F. Lefèvre. « Low-cost EVM measurement of ZigBee transceivers from 1-bit under-sampled acquisition ». Soumis à Transactions on Computer-Aided Design of Integrated Circuits and Systems
LIRMM, NXP-FR – H. El Badawi, F. Azais, S. Bernard, M. Comte, V. Kerzerho, F. Lefevre, “Investigations on the use of ensemble methods for specification-oriented indirect test of RF circuits”, J. of Electronic Testing: Theory and Applications (JETTA), Vol. 36, No. 2, pp. 189-203, 2020
LIRMM, NXP-FR – H. El Badawi, F. Azais, S. Bernard, M. Comte, V. Kerzerho, F. Lefevre, “Evaluation of a two-tier adaptive indirect test flow for a front-end RF circuit”, Submitted to J. of Electronic Testing: Theory and Applications (10/2020)
SU-LIP6, ST – A. Pavlidis, M.-M. Louërat, E. Faehn, A. Kumar, and H.-G. Stratigopoulos, “SymBIST: Symmetry-Based Analog and Mixed-Signal Built-In Self-Test for Functional Safety,” IEEE Transactions on Circuits And Systems – I: Regular Papers, 2020 (submitted)
TIMA – “R. Silveira Feitoza, M. Barragan, D. Dzahini, S. Mir, “Reduced-code static linearity test of split-capacitor SAR ADCs using an embedded incremental Sigma-Delta converter”, IEEE Transactions on Device and Materials Reliability, vol. 19, no. 1, pp. 37-45, March 2019
TIMA – M. Portolan, Automated Testing Flow: the Present and the Future, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Ed. IEEE, Vol. , DOI: 10.1109/TCAD.2019.2961328, décembre 2019
TIMA – G. T. Tchendjou, and E. Simeu, “Detection, Location and Concealment of Defective Pixels in Image Sensors,” IEEE Transactions on Emerging Topics in Computing (TETC), 2020.
Univ Twente – H. Ebrahimi and H.G. Kerkhoff, “A Digital On-line Monitor for Detecting Intermittent Resistance Faults at Board Level”, Journal of Circuits, Systems and Computers (JCSC), Vol 28, 2019
Workshop papers:
IROC – G. Harutyunyan, I. Nofal, M. Nicolaidis, Y. Zorian, “FIT Rate Calculation and Mitigation Techniques for Advanced Technologies and Automotive Applications”, 3rd IEEE International Workshop on Automotive Reliability & Test, Phoenix, Arizona, USA, 2018
LIRMM – A. Ibrahim, H. G. Kerkhoff, “ In-Field Utilization of the IEEE 1687 Standard,” International Test Standards Application Workshop (TESTA), Bremen, Germany, 2018
LIRMM – M. Da Silva, E. Valea, M.-L. Flottes, S. Dupuis, G. Di Natale, B. Rouzeyre, “A new secure stream cipher for scan chain encryption”, 3rd International Verification and Security Workshop (IVSW), 2018
LIRMM – B. Deveautour, A. Virazel, A.Bosio, P. Girard, “Exploring advantages of Approximate Computing in Logic Hardening”, South European Test Seminar (SETS), 2018
LIRMM – S. Mhamdi , A. Bosio, P. Girard, A. Virazel, “Systems-on-Chip Diagnosis for Automotive Applications ”, South European Test Seminar (SETS), 2018
LIRMM – B. Deveautour, A. Virazel, P. Girard, A. Bosio, “On Using Approximate Computing to Build an Error Detection Scheme?”, 3rd Workshop on Approximate Computing (AxC), 2018
LIRMM – E. Valea, M. L. Flottes, G. Di Natale, B. Rouzeyre, “Test Standards and Security”, South European Test Seminar (SETS), 2018.
LIRMM – E. Valea, M. L. Flottes, G. Di Natale, B. Rouzeyre, “Stream Cipher Based Encryption in IEEE Test Standards”, 8th Workshop on Trustworthy Manufacturing and Utilization of Secure Devices (TRUDEVICE), Baden Baden, Germany, 2019
LIRMM, NXP-FR – H. El Badawi, F. Azais, S. Bernard, M. Comte, V. Kerzerho and F. Lefevre, “The Use of Ensemble Learning in Indirect Testing of Analog and RF Integrated Circuits”, South European Test Seminar (SETS), Pitztal, Austria, 2019
LIRMM, NXP-FR – T. Vayssade, F. Azais, L. Latorre, F. Lefevre, “Test of 2.4 GHz ZigBee Transmitter using Standard Digital ATE”, South European Test Seminar (SETS), Pitztal, Austria, 2019
LIRMM, NXP-FR – H. El Badawi, F. Azais, S. Bernard, M. Comte, V. Kerzerho and F. Lefevre, “Indirect test of RF circuits using ensemble methods”, European Test Symposium Ph.D. Forum (virtual edition), 2020
LIRMM, NXP-FR – T. Vayssade, F. Azais, L. Latorre, F. Lefevre, “Low-cost testing of a 2.4GHz ZigBee transmitter using standard digital ATE”, European Test Symposium Ph.D. Forum (virtual edition), 2020
LIRMM, ST – S. Mhamdi, A. Virazel, P. Girard, A. Bosio, E. Auvray, E. Faehn, A. Ladhar, “Cell-Aware Dynamic Defect Diagnosis of Customer Returns by Using a Bayesian Classification Method”, IEEE Automotive Reliability and Test Workshop, 2019
LIRMM, TIMA, Thales, INVIA – M. Merandat, V. Reynaud, E. Valea, J. Quevremont, N. Valette, P. Maistri, R. Leveugle, M.-L. Flottes, S. Dupuis, B. Rouzeyre, G. Di Natale, “A Comprehensive Approach to a Trusted Test Infrastructure”, 4th International Verification and Security Workshop (IVSW), Rhodes, Greece, 2019
SU-LIP6 – A. Pavlidis, M.-M. Louërat, E. Faehn, A. Kumar, and H.-G. Stratigopoulos, “SymBIST: Symmetry-based Analog/Mixed-Signal BIST,” 32. GI / GMM / ITG – Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, Ludwigsburg, Germany, February 2020
Univ. Twente – A. Ibrahim, H. G. Kerkhoff, “Structural Modelling of IEEE 1687 networks,” International Test Standards Application Workshop (TESTA), Baden-Baden, Germany, 2019
Univ. Twente – A. Ibrahim and H.G. Kerkhoff, “In-field Utilization of the IEEE 1687 Standard”, 3rd International Test Standards Application Workshop (TESTA), Bremen Germany, 2018
National conferences:
LIRMM – V. Reynaud, P. Maistri, R. Leveugle, «Accès autorisé au réseau reconfigurable de test par ensemble de segments», 13ème Colloque du GDR SoC/SiP, Paris, 13-15 juin 2018.
LIRMM – E. Valea, M. Da Silva, G. Di Natale, M. Flottes, S. Dupuis and B. Rouzeyre, “SECCS: SECure Context Saving for IoT devices”, Colloque GDR SoC-SoC18, Paris, France, 13-15 juin 2018
LIRMM – M. Da Silva, E. Valea, M.-L. Flottes, G. Di Natale, B. Rouzeyre. “Stream cipher-based scan encryption in test standards”, Colloque GDR SoC-SoC18, Paris, France, 13-15 juin 2018
LIRMM – “B. Deveautour, A. Virazel, A. Bosio, P. Girard, “”On using Approximate Computing in Duplication Schemes””, Colloque GDR SoC-SoC18, Paris, France, 13-15 juin 2018
LIRMM – “S. Mhamdi, A. Virazel, A. Bosio, P. Girard, “”Systems-on-Chip Diagnosis for Automotive Applications”” , Colloque GDR SoC-SoC18, Paris, France, 13-15 juin 2018
LIRMM – B. Deveautour, A. Virazel and P. Girard, “On using Approximate Computing in Arithmetic Circuit Duplication Scheme”, Colloque GDR SoC-SoC19, Montpellier, France, 19-21 juin 2019
LIRMM – E. Valea, M. Flottes, G. Di Natale, B. Rouzeyre, “Encryption Techniques for Test Infrastructures”, Colloque GDR SoC2, Montpellier, France, June 2019
LIRMM, NXP-FR – H. El Badawi, F. Azais, S. Bernard, M. Comte, V. Kerzérho and F. Lefevre, “The use of ensemble methods for indirect test of RF circuits”, Colloque GDR SoC-SoC19, Montpellier, France, 19-21 juin 2019
LIRMM, ST-GB – S. Mhamdi, A. Virazel, P. Girard, A. Bosio, A. Ladhar, E. Faehn and E. Auvray, “A Learning-Guided Intra-Cell Diagnosis Flow for System-on-Chip”, Colloque GDR SoC-SoC19, Montpellier, France, 19-21 juin 2019
SU-LIP6 – H.-G. Stratigopoulos, “Machine Learning Applications in Semiconductor Manufacturing and Test”, journée GDR SOC2, “Sécurité, fiabilité et test des SoC: challenges et,opportunités dans l’ère de l’IA”, Paris, mai 2019
TIMA – R. S. Feitoza, M. J. Barragan, D. Dzahini and S. Mir, “Static linearity test of SAR ADCs using an embedded incremental Sigma-Delta converter”, 21ème Journées Nationales du Réseau Doctoral en Micro-nanoélectronique (JNRDM), Montpellier, 2019.
Invited Talks:
IROC – Special Session – “I. Nofal, “Evaluation Tool of MCUs Distributions in Memories”, IEEE Int. Symp. on On-Line Testing and Robust System Design (IOLTS), Platja d’Aro, Spain, 2018
IROC – Keynote – Dan Alexandrescu, “Radiation concerns in the automotive industry mechanisms, standards, typical measurements”, G-RAD 2020 Grenoble, France
SU-LIP6 – Special Session – H.-G. Stratigopoulos, “Adaptive Test: Machine Learning in Real Time on Big Data,” IEEE VLSI Test Symposium (VTS), San Francisco, CA, USA, April 2018
TIMA – Special Session – G. Leger, M. Barragan, Mixed-signal test automation: are we there yet?, Invited talk (Special Session), IEEE International Symposium on Circuits & Systems (ISCAS’2018), Florence, ITALY, DOI: 10.1109/ISCAS.2018.8351734, 27 au 30 mai 2018
TIMA – Special Session – V. Reynaud, P. Maistri, R. Leveugle. Authenticated Access to Scan Chains. Invited talk, Special Session on A Comprehensive Approach to a Trusted Test Infrastructure, 4th International Verification and Security Workshop (IVSW), Rhodes (GR), July 2019
TIMA – Invited Talk – P. Maistri. Secure Test Architectures in IoT. Invited Talk, European Nanoelectronics Applications, Design & Technology Conference (ADTC 2019), Dresden (DE), May 2019
TIMA – Keynote – L. Anghel, “Managing Aging Induced Reliability at Run-time”, International Workshop on Cross lAyer Resiliency, Stuttgart, July 2019
TIMA – Invited Talk – M. Portolan, R. S. Feitoza, G. T. Tchendjou, V. Reynaud, K. Kannan, M. Barragán, E. Simeu, P. Maistri, L. Anghel, R. Leveugle, S. Mir, “A Comprehensive End-to-end Solution for a Secure, and Dynamic Mixed-signal 1687 System”, Invited talk, 26th IEEE International Symposium on On-Line Testing and Robust System Design, Naples, Italy, July 13-15, 2020.
TIMA, LIRMM – Invited Talk – S. Mir, M. Barragán and M. Mammasse. BIST solutions for industrial mixed-signal circuits. Invited Talk, Special Session on Resilient and Secure Mixed-Signal/RF Circuits and Systems, 25th IEEE International Symposium on On-Line Testing and Robust System Design, Rhodes Island, Greece, July 1-3, 2019.
TIMA, ST – Special Session – L. Anghel, “Run-time Age Induce Reliability adaptation for SOC”, IEEE Latin America Test Symposium, Santiago de Chile, Chile, March 2019
Univ. Twente – Keynote – H. G. Kerkhoff, “How to Guarantee High Dependability of Future Many-Core Systems-on-Chip,” IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC), Hanoi, Vietnam, 2018
Univ. Twente – Keynote – H. G. Kerkhoff, “Designing Highly Dependable Many-Processor Cyber-Physical Systems-on-Chip for Automotive Applications,” IEEE Latin America Test Symposium (LATS), Santiago, Chile, 2019
Univ. Twente – Keynote – H.G. Kerkhoff, “Highly Dependable Many-Processor Systems-on-Chips for Cars,” International Test Conference in ASIA (ITC-ASIA), Tokyo, Japan, 2019.
Univ. Twente – Keynote – L. Anghel, “Managing Aging Induced Reliability at Run-time”, International Workshop on Cross lAyer Resiliency, Stuttgart, July 2019
Tutorials at conferences:
IROC – Half-day Tutorial – T. Bonnoit, M. Glorieux and D. Alexandrescu, “Impact of Soft Errors on Data Centers”, Institut Supérieur de l’Aéronautique et de l’Espace (ISAE-SUPAERO), April 2019
IROC – Half-day Tutorial – T. Bonnoit, M. Glorieux and D. Alexandrescu, “EEOS-207 -Natural Radiation Environment effects on Avionics, Launchers”, Institut Supérieur de l’Aéronautique et de l’Espace (ISAE-SUPAERO), April 2020
SU-LIP6 – Half-day Tutorial – H.-G. Stratigopoulos and Y. Makris, “From Data to Actions: Applications of Data Analytics in Semiconductor Manufacturing & Test,” IEEE International Test Conference (ITC), Fort Worth, TX, USA, October 2017
SU-LIP6 – Embedded Tutorial – H.-G. Stratigopoulos, “Machine learning applications in IC testing,” IEEE European Test Symposium (ETS), Bremen, Germany, May 2018
SU-LIP6 – Half-day Tutorial – H.-G. Stratigopoulos and Y. Makris, “Applications of Machine Learning in Semiconductor Manufacturing and Test,” Design, Automation and Test in Europe Conference, Florence, Italy, March 2019
SU-LIP6 – Test Spring School 2019 – H.-G. Stratigopoulos, “Analog, Mixed-Signal, RF IC Testing: Essentials and Current Trends”, Baden Baden, Germany, May 2019
SU-LIP6 – Half-day Tutorial – H.-G. Stratigopoulos and Y. Makris, “From Data to Actions: Applications of Data Analytics in Semiconductor Manufacturing & Test,” IEEE International Test Conference (ITC), Washington, DC, USA, November 2019
SU-LIP6 – Half-day Tutorial – H.-G. Stratigopoulos and Y. Makris, “From Data to Actions: Applications of Data Analytics in Semiconductor Manufacturing & Test,” IEEE International Test Conference (ITC), Virtual Conference, 2020
M.Sc. Thesis:
LIRMM – E. Valea, “Security Techniques for Test Infrastructures”, Ph.D. Thesis, Iniversity of Montpellier 2020.
LIRMM, NXP-FR – T. Vayssade, “Low-cost digital test approach for RF integrated circuits: Application to ZigBee transceivers”, Ph.D Thesis, University of Montpellier, October 2020
LIRMM, NXP-FR – H. EL Badawi, “Methodology for Efficient Implementation of Indirect Testing for Ana log/RF Integrated Circuits”, Ph.D Thesis, University of Montpellier, November 2020
SU-LIP6 – A. Pavlidis, “Fault diagnosis of analog and mixed-signal circuits and systems,” PhD Dissertation, Sorbonne Université, May 2021 (expected)
SU-LIP6 – S. A. El-Sayed, ” Fault-tolerant spiking neural networks in silicon,” PhD Dissertation, Sorbonne Université, May 2021 (expected)
TIMA – V. Renaud, “Secured access to IEEE 1687 test resources in the IoT context”, March 2021 (expected)
TIMA – R. Feitoza-Silveira, “Design-for-test strategies for built-in static test of high-performance SAR ADCs”, March-April 2021 (expected)
TIMA – K. Senthamarai Kannan, “Performance and Safety/Security Management in automotive and IoT applications”, April 2021 (expected)
U Grenoble-Alpes – A. Sivadasan, “Design and Simulation of Digital Circuits in 28nm FDSOI technology for High Reliability,” MSc thesis, Université Grenoble Alpes, July 2018
Univ. Twente – S. Geerlings, “Analysis and Design of a Dependability Manager for Self-Aware System-on-Chips,” Master’s thesis, University of Twente, 2018
Univ. Twente – M. A. Chaudhry”Evaluation of network on chip infrastructures for dependability management in multicore processors,” MSc. thesis, University of Twente/University of Bologna, 2018
Univ. Twente – A. C. Zambrano, (2018). PhD thesis: A dependable anisotropic magnetoresistance sensor system for automotive applications. University of Twente. https://doi.org/10.3990/1.9789036545990
Univ. Twente – J. Wan, (2019). PhD thesis: Ageing and embedded instrument monitoring of analogue/mixed-signal IPS. University of Twente. https://doi.org/10.3990/1.9789036548298
Univ. Twente – Y. Zhao, (2019). PhD thesis: Health monitoring and life-time prognostics to enable dependable many-processor S0Cs. University of Twente. https://doi.org/10.3990/1.9789036549165